Hi
Myself Shobhit , I am having 11+ years of experience with FPGA Design and System Verification, Using SystemVerilog,Verilog and VHDL. In the past I have created various IPs and Verification Environments for FPGA,SoC and Subsystems.
This Job seems very suitable to me , I have prior experience on Lattice Tool ( Diamond & ISPLever ) , even I have Lattice FPGA Board ( Versa Kit ) ECP3.
I have Various Design Expertise using Ethernet Aggregators , Video Systems , Automation Systems, Automotive Systems.
Even I understand the benefits and utility of python , In the past I wrote IP Generators in Python , which automatically generates , basic testcases , UVM/VHDL/Verilog Based test environment.
Please let me know what is the actual environment , which you actually want to test, I might have more creative ideas.
Thanks
Shobhit