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Need example code de-10

I need a sample code on DE-10 code for utilizing the FPGA-HPS bridge with more emphasis on hardware acceleration. (C ,VHDL prefferd /Verilog).

I am trying to explore the functionality where I can write some data from HPS to the FPGA. let the FPGA process it and HPS read back the result.

I need to see some processing happening in FPGA on request from HPS . IT could be as simple as AND implementation. However a more complex example is much more appreciated.

Please no blinking LED already present in the Intel Website.

I might have future works based on how we go with this.

Skills: Verilog / VHDL, Microcontroller, C Programming, FPGA

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About the Employer:
( 0 reviews ) India

Project ID: #20747727

6 freelancers are bidding on average $161 for this job

vinodluhar

Hi I have worked on the altera tools and FPGAs and also have used de nano and de-2 115 boards and quartus software. I can make an example design and can explain you very well. Thanks

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Fpgageek

Hi I have worked on altera tools and FPGAs. Please let me know if the requirement is still there I can work on it. Thanks

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sayedhanafy97

Hello there, i am an electronics engineer who has more than 3 years experience in VHDL/Verilog and FPGAs and i understand you task very carefully so i think i can do it easily, efficiently and on time thanks in advanc More

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dirtrace

Highly interested with your project and I'm ready to start right now. My completion rate is always 100% that I STRICTLY BITE ONLY WHICH I CAN CHEW. Please message me to discuss more!

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himanshusharma01

Hi I have been working on Verilog-VHDL and Xilinx and Altera FPGAs by more than 6 years. I have a custom user defined protocol made to transfer data from fpga to processor and processor to fpga. Please let me know i More

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FSFH

Design Engineer with Experience in Large scale complex projects development with practicing in Verilog, VHDL, SystemVerilog and programming with C, C++, Python. Let's discuss further.

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