Digital Design

Completed Posted 6 years ago Paid on delivery
Completed Paid on delivery

you will design and implement a simple 4-bit adder, using half

adder and full adder components in a combinatorial approach. In the design, as

you know how to do it, you are expected to design a full adder using the half adder

components. Next, you need to design a 4-bit adder circuit using multiple full adder

components together. Schematic designs of half adder, full adder and 4-bit adder

circuits are given below. ( you will find it in pdf file

Circuit Design Electrical Engineering Electronics Verilog / VHDL

Project ID: #15762183

About the project

13 proposals Remote project Active 6 years ago

Awarded to:

SqUa11

Hello, I checked your project description about implementing a full adder using different techniques beside designing 4-bit adder. I can handle the task and deliver it in 6 hours Relevant Skills and Experience 5 More

$35 USD in 10 days
(72 Reviews)
5.3

13 freelancers are bidding on average $28 for this job

uetian09ee506

Hi I can do your project as per your description

$50 USD in 3 days
(282 Reviews)
7.3
nayeem4444

A proposal has not yet been provided

$35 USD in 1 day
(116 Reviews)
6.2
sajjadahmed19

A proposal has not yet been provided

$20 USD in 2 days
(64 Reviews)
5.9
jasnaikaran

Hello, I am an electronics engineer having experience in digital system design using vhdl for more than 5 years. Relevant Skills and Experience VHDL Proposed Milestones $23 USD - VHDL Coding

$23 USD in 1 day
(18 Reviews)
4.3
sourindu

A proposal has not yet been provided

$25 USD in 1 day
(1 Review)
2.3
alexstyle

A proposal has not yet been provided

$25 USD in 7 days
(1 Review)
1.5
karthikmuliyar

Hi, I may be new to freelancer but I have done a few projects using Verilog hdl. Ide : Xilinx The verilog code (abstract) for your project is the following code, please select me if you are interested. The outline of More

$10 USD in 1 day
(0 Reviews)
0.0
MaryNicole

I have already done a project like that. It will take me like a few hours to implement it in Verilog. I provide a code with comments accompanied with proper test benches. Relevant Skills and Experience I've already im More

$35 USD in 0 days
(0 Reviews)
0.0